The decrease of the integrated circuits size lets to increase the performances and reduce the manufacture costs. However, this shrink causes the preponderance of interconnect delay compared to the transistor commutation time. Despite a high sensibility to plasma exposure, a porous SiOCH dielectric material with a lower k-value is implemented. This work focuses on the development of in situ plasma treatments performed after the etching of the imprint of metallic line into the dielectric material. These treatments, based on reductive, oxidizing and hydrocarbon chemistries, aim to 1) limit the residues formation in the case of a metallic hard mask which can cause yield losses and 2) limit the diffusion of the metallic barrier into the dielectric material. However, these treatments (NH3, O2, CH4, H2) have been optimized so as to not increase the modification induced by the etching step. The characterization of the dielectric material modification, induced by the treatments, at the bottom and the sidewalls of the trenches has been performed using new or optimized techniques. Thus, with all the plasma treatments, a modified layer is observed on both bottom and sidewalls of the trenches with different characteristics (thickness, permeation, surface composition...). The methane based plasma treatment limits the growth of metallic residues without increasing the modification induced by the etching step. This treatment has been implemented in production at STMicroelectronics.
