SEEPROC : a reconfigurable data path processor model for embedded image processing

The work presented in this manuscript suggest an architecture of a reconfigurable datapath processor (RDP) dedicated to low-level image processing. To meet the requirements of this field, the processor, called SeeProc and based on a RISC architecture, includes in its datapath customs processing elements specifically dedicated to the computation of image data in matrix form. These units can be configured in number and functionality depending on the application. The datapath interconnection topology is provided dynamically using a crossbar device. In addition, to make the programming accessible to users with no knowledge of electronics digital, a dedicated assembly language and an optimization methodology have been developed.

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Source https://theses.hal.science/tel-00864180
Author Roudel, Nicolas
Maintainer CCSD
Last Updated May 9, 2026, 16:19 (UTC)
Created May 9, 2026, 16:19 (UTC)
Identifier NNT: 2012CLF22234
Language fr
Rights https://about.hal.science/hal-authorisation-v1/
contributor Institut Pascal (IP) ; Université Blaise Pascal - Clermont-Ferrand 2 (UBP)-SIGMA Clermont (SIGMA Clermont)-Centre National de la Recherche Scientifique (CNRS)
creator Roudel, Nicolas
date 2012-04-18T00:00:00
harvest_object_id 5570cc29-b72f-4985-bf33-e3dfae2740ff
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2026-03-30T00:00:00
set_spec type:THESE