Fast and Autonomous HLS Methodology for Hardware Accelerator Generation Under Resource Constraints

ISBN : 978-0-7695-5074-9

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Source Proceedings of Euromicro Conference on Digital System Design (DSD'13)
Author Prost-Boucle, Adrien, Muller, Olivier, Rousseau, Frédéric
Maintainer CCSD
Last Updated May 7, 2026, 18:41 (UTC)
Created May 7, 2026, 18:41 (UTC)
Identifier hal-00919969
Language en
contributor Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)
coverage Santander, Spain
creator Prost-Boucle, Adrien
date 2013-09-04T00:00:00
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harvest_source_title test moissonnage SELUNE
metadata_modified 2026-03-26T00:00:00
relation info:eu-repo/semantics/altIdentifier/doi/10.1109/DSD.2013.30
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