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Custom Operator Identification for High-level Synthesis
It is increasingly common to see custom operators appear in various fields of circuit design. Custom operators that can be implemented in special hardware units make... -
Generation of Efficient High-Level Hardware Code from Dataflow Programs
High-level synthesis (HLS) aims at reducing the time-to-market by providing an automated design process that interprets and compiles high-level abstraction programs... -
High-performance floating-point computing on reconfigurable circuits
Due to their potential performance and unmatched flexibility, FPGA-based accelerators are part of more and more high-performance computing systems. However, exploiting... -
management of memory unit during higj level synthesis
Systems handle more and more complex applications. Processing increases faster than storage capacities. Memory becomes a bottleneck since the quantity of information... -
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator.... -
A Formal Method for Hardware IP Design and Integration under I/O and Timing C...
IP integration -that is one of the most important SoC design steps- requires taking into account communication and timing constraints. In that context design and reuse... -
DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive Syste...
This paper presents our contribution in terms of synchronization processor to a SoC design methodology based on the theory of the latency in-sensitive systems (LIS) of... -
FPGA-based smart camera : industrial applications
International audience -
Design exploration and HW/SW rapid prototyping for real-time system design
Embedded signal processing systems are usually associated with real-time constraints and/or high data rates such that fully software implementation are often not... -
Electronic System Level to Hw/Sw Design Flow
The increasing needs for higher data rates associated with mobility constraints motivates the development of the fourth generation of wireless systems. In this paper... -
Study and development of a AMS design-flow in SytemC : semantic, refinement a...
Systems on Chip (SoC) embed in the same chip analogue parts and digital processing units. While their complexity is ever increasing, their time to market is becoming... -
A communication synthesis approach for distributed systems
This paper presents an interactive communication synthesis approach for distributed systems. The aim of the proposed approach consists in mapping a high level... -
Acceleration of a bioinformatics application using high-level synthesis
The revolutionary advancements in the field of bioinformatics have opened new horizons in biological and pharmaceutical research. However, the existing bioinformatics... -
A Framework for High Level Estimations of Signal Processing VLSI Implementations
This paper deals with the presentation of a framework for the rapid prototyping of Digital Signal Processing applications. The BSS framework enables both synthesis of... -
Synthesis of pipelined architectures using the polyhedral model
Due to the advances in semiconductor technologies, embedded hardware is capable of satisfying the performance constraints of increasingly complex applications. This... -
Fast and Standalone Design Space Exploration for High-Level Synthesis under R...
International audience -
Rapid prototyping platform based on high-level synthesis for radicommunicatio...
Semi-conductor very deep sub-micron technologies available today and single-die system integration complexity increase raise new methodological challenges in system... -
Fast and Autonomous HLS Methodology for Hardware Accelerator Generation Under...
ISBN : 978-0-7695-5074-9 -
Improving High-Level Synthesis Effectiveness Through Custom Operator Identifi...
International audience -
A Design Approach to Automatically Synthesize ANSI-C Assertions during High-L...
International audience
