-
Embedded and secure traceability : autonomous authentication of objects and o...
"Human-to-Machine" authentication is widely developed for modern telecommunications. A "Machine-to-Human" authentication will ensure the trusted human user about the... -
Countermeasures against EM analysis for a secured FPGA-based AES implementation
ISBN : 978-1-4799-2078-5 -
Characterization and monitoing methods of technological and environmental cha...
Modern circuits are more and more sensitive to environmental and technology changes. In this context, reprogrammable components like FPGAs represent an interesting... -
Crypto-processor – architecture, programming and evaluation of the security
Architectures of cryptographic processors and coprocessors are often vulnerable to different kinds of attacks, especially those targeting the disclosure of encryption... -
A regular fabric design methodology for applications requiring specific layou...
International audience -
GPU-Like On-Chip System for Decoding LDPC Codes
International audience -
BIST for Logic and Local Interconnect Resources in a Novel Mesh of Cluster FPGA
ISBN : 978-1-4799-1583-5 -
Exploration of generic architectures on FPGA for algorithms of multispectral ...
The Multiprocessor-System-On-Chip (MPSoC) architectures based on the Network-On-Chip (NoC) communication are the one of the most appropriate solution for image and... -
Using electromagnetic emanations for variability characterization in Flash-ba...
International audience -
MRAPI Resource Management Layer on Reconfigurable Systems-on-Chip
International audience -
FPGAs virtuels : enjeux et usages
International audience -
Multi-shape Tasks Scheduling for Online Multitasking on FPGAs
International audience -
FPNA: interaction between FPGA and neural computation
Article dans revue scientifique avec comité de lecture. -
Conciliating connectionism and parallel digital hardware
Article dans revue scientifique avec comité de lecture. -
Digital hardware implementation of 2D compatible neural networks
Colloque avec actes et comité de lecture. internationale. -
Building a 2D-compatible multilayer neural network
Colloque avec actes et comité de lecture. internationale. -
Simplified neural architectures for symmetric boolean functions
Colloque avec actes et comité de lecture. internationale.
