Electrical characterization of junctionless transistors with numerical simulation

In this dissertation, the performance of junction less transistors (JLTs) as possible candidates for the continuation of Moore’s law was investigated experimentally based on an in-depth study of their electrical characteristics. Current-voltage I-V and capacitance-voltage C-V were analyzed in a wide rangeof temperatures (from 80 K to 350 K) in correlation with device operation mechanism. Lowfrequencynoise was also studied and compared to that of inversion-mode transistors. This study requirednew parameter extraction methods to be defined for JLTs. Their validity was confirmed by 2-dimensional (2D) simulation results. They will be detailed in this dissertation.

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Source https://theses.hal.science/tel-00957622
Author Jeon, Dae-Young
Maintainer CCSD
Last Updated May 6, 2026, 02:18 (UTC)
Created May 6, 2026, 02:18 (UTC)
Identifier NNT: 2013GRENT080
Language fr
Rights https://about.hal.science/hal-authorisation-v1/
contributor Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC) ; Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National Polytechnique de Grenoble (INPG)-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)
creator Jeon, Dae-Young
date 2013-10-23T00:00:00
harvest_object_id 5bae4563-6773-4dd5-8318-0aef963efdf7
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2026-03-31T00:00:00
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