heoretical and experimental studies of FD SOI devices performances for sub 32 nm nodes

This manuscript presents a theoretical and experimental study carried out on advanced technology the FD SOI MOSFETs (Fully Depleted Silicon On Insulator MOSFET’s). Electrical measurements combined with modeling were performed with an aim of bringing explanations of phenomena related to the dimension reduction in these structures. This work gives an answer of the impact of these aspects on the electrical parameters and on the carriers transport in the channel.