The designers of Printed Circuit Board (named “board” below) tend to use more and more multi-gigabit serial links rather than traditional parallel buses. It enables to push back the density limitations and to increase embedded functionalities of the board. This thesis is the result of collaboration with THALES Communications & Security and the SATIE laboratory of ENS Cachan. The goal of the thesis was to define an approach dedicated to the study of Multi-GigaHertz (MGH) signals in order to assure that digital complex boards work without costly multiple prototype designs. After an inventory of the state of the arts, this work was conducted in three parts: The firt part relates to the study of the propagation channel. The spectral power distribution of the multi-gigabit links ranges from DC to several dozens of gigahertz, it is the reason why specific simulation softwares usually used in the hyper-frequency field have to be used A benchmark of several most recent 3D ElectroMagnetic (EM) solvers has been achieved in order to quickly and accurately extract the S Parameter matrix of the propagation channel thanks to information from CAO softwares used in THALES The second part consisted to take into account the transmitters, the receivers and the digital treatments associated in the circuit simulation in order to calculate eye diagrams, Bit Error Rate (BER) and Jitter separation. The benchmark of the latest generation of channel simulators was needed for the use of the recent norm IBIS-AMI and the comparison of the performances with other tools, such as HSPICE. This step has been led in close collaboration with the simulation software suppliers because some tools are not mature enough to fit into a global design flow. Finally, thanks to the validation of the simulation flow with measurements, a deep sudy of the different components of the jitter has been conducted depending on the physical phenomenon being more or less destructive for the quality of the transmission. This study enabled to define design rules and design methodology taking into account the margins allocated from the results of the jitter analysis.
