The two main limitations of Flash nonvolatile memories charge storage in silicon nanocrystals are the small memory window and the dispersion of electrical characteristics due to the size dispersion of nanocrystals. In this thesis, several solutions are studied in order to remedy these defects. In order to increase the programming window, a first approach is to increase the density of charges stored in the device through the use of a double layer of silicon nanocrystals. The operation and electrical performance of these memory devices are studied and interpreted through an analytical model. A second approach, more upstream, is the use of metallic nanocrystals to increase the amount of trapped charges in the nanocrystals. Deposition, passivation and integration of metal nanocrystals (Pt, TiN, W) as a floating gate in a memory device have been realized. Finally, the "bottom-up" organisation of nanocrystals is proposed as a solution to the dispersion of electrical characteristics of memory devices. An original process for transferring a self-organized diblock copolymer mask into a hard mask is developed and used to etch nanocrystals with small size dispersion.
