With the advanced technologies (typ. < 32nm), it is more and more difficult to control the manufacturing variabilities. It impacts more severely the working frequency and the consumed energy, and induces more and more failure inside the device. This is particularly true for MPSoC with a large number of computing cores. With the increasing needs (performance, functionalities, low power, fault tolerance) and heterogeneous characteristics (frequency, energy, failures) it becomes difficult to apply to systems able to meet these requirements. This work focus on this perspective to deal with these issues for the massively parallel MPSoC, based on 2D mesh topology. This thesis proposes an automated methodology, allowing the mapping and scheduling of application on the targeted system. It takes into account the variability, energy and computing power. Furthermore, this thesis proposes a fault tolerant adaptive mapping technique, paired with an original failure recovering strategy. This strategy allows to guarantee the termination of the application in the presence of failures, without the check-point requirement. The technique has been extended with an adaptive distributed algorithm, taking into account the manufacturing variability and aimed at reducing the consumed energy.
