The regular downscaling of MOS transistors dimensions allows integrating a largest number of functions on integrated circuits with an increase of their speed at each tech- nology node. Unfortunately, it has induced more difficulties for designers, notably due to the increase of the power consumption and to the propagation time of signals through the chip. The clock distribution, which insures the synchronism of circuit operations, is the most symptomatic component. The distributed generation of clock comes out as an alternative to traditional solu-tions. It relies on the set of N oscillators geographically distributed on the chip. Each oscillator locally generates the clock for its own zone. Clock phase of a generator is adjusted with respect to its close neighbourhoods. In this way, clock signal doesn't have to cover a large distance. However, performances of the horology system are linked, not to one, but to N oscillators operating in a hostile environment (power supply and temperature variations, etc.). Thus, this thesis aims of the design of a robust digitally controlled oscillator. More precisely, our issue is : " How To Design a robust DCO (Digitally Controlled Oscillator) subject to the hostile environment of a SoC (System-On-Chip) in a sub-micrometer CMOS technology ? " To answer this question, we propose, in a first time, the characterization of a topology of DCO; the goal is to determine its relevance with respect to our application. Since this topology is emergent, for the moment, no theory is provided by the literature. With our analysis, we highlight its weakness and the need to join protection devices. For this reason, the clock circuit performances are not only dependent on the oscillator, but also on the safety system added. This conclusion motivates the development of an alternative which doesn't imply the same constraints. Finally, we propose a robust digitally controlled oscillator able to stand power supply and temperature variations. This one is designed from well-known analog blocks described by the literature. To limit the impacts of supply voltage and temperature variations on the oscillator, we take advantage on short channel effects exhibited by current MOSFETs.
