Hardware architectures for morphological filters with large structuring elements

This thesis is focused on implementation of fundamental morphological filters in the dedicated hardware. The main objective of this thesis is to provide a programmable and efficient implementation of basic morphological operators using efficient dataflow algorithms considering the entire application point of view. In the first part, we study existing algorithms for fundamental morphological operators and their implementation on different computational platforms. We are especially interested in algorithms using the queue memory because their implementation provides the sequential data access and minimal latency, the properties very beneficial for the dedicated hardware. Then we propose another queue-based arbitrary-oriented opening algorithm that allows for direct granulometric measures. Performance benchmarks of these two algorithms are discussed, too. The second part presents hardware implementation of the efficient algorithms by means of stream processing units. We begin with 1-D dilation unit, then thanks to the separability of dilation we build up 2-D rectangular and polygonal dilation units. The processing unit for arbitrary-oriented opening and pattern spectrum is described as well. We also introduce a method of parallel computation using a few copies of processing units in parallel, thereby speeding up the computation. All proposed processing units are experimentally assessed in hardware by means of FPGA prototypes, and the performance and FPGA occupation results are discussed. In the third part, the proposed units are employed in two diverse applications illustrating thus their capability of addressing performance-demanding, low-power embedded applications. The main contributions of this thesis are: 1) new algorithm for arbitrary oriented opening and pattern spectrum, 2) programmable hardware implementation of fundamental morphological operators with large structuring elements and arbitrary orientation, 3) performance increase obtained through multi-level parallelism. Results suggest that the previously unachievable, real-time performance of these traditionally costly operators can be attained even for long concatenations and high-resolution images

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Source https://theses.hal.science/tel-00788984
Author Bartovsky, Jan
Maintainer CCSD
Last Updated May 14, 2026, 11:07 (UTC)
Created May 14, 2026, 11:07 (UTC)
Identifier NNT: 2012PEST1060
Language fr
Rights https://about.hal.science/hal-authorisation-v1/
contributor Laboratoire d'Informatique Gaspard-Monge (LIGM) ; Université Paris-Est Marne-la-Vallée (UPEM)-École nationale des ponts et chaussées (ENPC)-ESIEE Paris-Fédération de Recherche Bézout (BEZOUT) ; Centre National de la Recherche Scientifique (CNRS)-Centre National de la Recherche Scientifique (CNRS)-Centre National de la Recherche Scientifique (CNRS)
creator Bartovsky, Jan
date 2012-11-14T00:00:00
harvest_object_id fe417849-0012-406c-b1b7-13bace258a4f
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2026-05-08T00:00:00
set_spec type:THESE