Modélisation des Transistors MOS de puissance pour l'électronique de commutation

The theoretical efficiency of switching converters is 100 %, which makes them very attractive for their use in energy conversion applications. However, their co st and size imply the use of ever higher commutation frequencies (leading to EMC problems) and their integration into modem substrates (SMI, hybride, Si). Simulation of the converter structure has therefore become a vital step in the design process, as has the fine modelling of its components (including power MOSFETs which are often used at low voltages). The present work deals with the modelling of the VDMOS transistor. It comprises of three chapters. In the first chapter, the static behaviour of the VDMOS is analysed, taking into account the specificity of its double-diffused canal. The simplified model developped only needs 5 parameters. In the second chapter, the dynamical behaviour of the VDMOS wÙhin its commutation cell is studied in detail. This study introduces 6 extra parameters which, by describing the influence of currents levels on the commutations, make the model more accurate thus complementing the static analysis. The methods used for extracting the parameters from measurements are described in each chapter. The third chapter validates the model using the simulation software Pspice. A comparative study is carried out against . . the litterature.

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Source https://theses.hal.science/tel-00763815
Author Aubard, Laurent
Maintainer CCSD
Last Updated May 31, 2026, 18:43 (UTC)
Created May 31, 2026, 18:43 (UTC)
Identifier tel-00763815
Language fr
Rights https://about.hal.science/hal-authorisation-v1/
contributor Laboratoire de Magnétisme du Navire (LMN) ; Institut National Polytechnique de Grenoble (INPG)
creator Aubard, Laurent
date 1999-01-22T00:00:00
harvest_object_id ec90b1b3-8c8d-4fc6-9cf6-e23d11bda223
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2025-09-28T00:00:00
set_spec type:THESE