Design of tools for rapid prototyping onto FPGA for applications in image processing

This manuscript presents work to propose a development cycle to establish RISP processors in a reprogrammable chip (FPGA). After a description of the various possible solutions to produce image processing prototypes, this document describes a method which consists in generating hardware models of processor target to image processing, with operators just for a given application. Test with a set of common algorithm makes evaluate the performances of the design cycle proposed. Rapid prototyping of a contact less biometric system, based on palmprint recognition, is also realized on the test platform.

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Source https://theses.hal.science/tel-00708233
Author Saptono, Debyo
Maintainer CCSD
Last Updated May 15, 2026, 18:09 (UTC)
Created May 15, 2026, 18:09 (UTC)
Identifier NNT: 2011DIJOS079
Language fr
Rights https://about.hal.science/hal-authorisation-v1/
contributor Laboratoire Electronique, Informatique et Image [UMR6306] (Le2i) ; Université de Bourgogne (UB)-École Nationale Supérieure d'Arts et Métiers (ENSAM)-AgroSup Dijon - Institut National Supérieur des Sciences Agronomiques, de l'Alimentation et de l'Environnement-Centre National de la Recherche Scientifique (CNRS)
creator Saptono, Debyo
date 2011-11-04T00:00:00
harvest_object_id 6ca74e33-5945-4e8c-b1c3-43de408dc005
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2026-03-31T00:00:00
set_spec type:THESE