Fault diagnosis of ICs has grown into a special field of interest in semiconductor industry. At the design stage, diagnosing the sources of failures in IC prototypes is very critical to reduce design iterations in order to meet the time-to-market goal. In a high-volume production environment, diagnosing the sources of failures can assist the designers in gathering information regarding the underlying failure mechanisms. In cases where the IC is part of a larger system that is safety critical (e.g. automotive, aerospace), it is important to identify the root-cause of failure and apply corrective actions that will prevent failure reoccurrence and, thereby, expand the safety features. In this thesis, we have developed a methodology for fault modelling and fault diagnosis of analog/mixed circuits. A new approach has been proposed to diagnose both catastrophic and parametric faults based on machine learning. We then focused on spot defects which are more probable to occur in reality in order to develop an efficient diagnosis approach. The proposed diagnosis methodology has been demonstrated on data of failed devices provided by NXP Semiconductors - Netherlands.
