This work presents the study of the electrical transport in low dimensional highly doped silicon structures. The context of this study is the understanding of the mesoscopic transport and the size reduction of MOS devices. The nanostructures are fabricated by a local oxidation under the tip of an atomic force microscope (AFM), on ultra-thin silicon on insulator (SOI) substrates. This technique was preferred for its high flexibility, resolution (10nm) and no proximity effects. It allows obtaining nanostructures with cross-sections of some hundreds square nanometers.While the electrical behaviour at room temperature is similar to MOS/SOI devices, at low temperatures current oscillations are superimposed to the field effect and dominate the transport under 70K. Thus, the electrical transport is subject to Coulomb blockade, characterized by current oscillations, Coulomb diamonds shapes in the current versus drain voltage and gate voltage mapping and the simple activation law of the conductance. We associate the Coulomb blockade in these nanowires to the potential wells due to the presence of the doping atoms in the structures. A one dimensional array of islands model explains the electrical behaviour of the low doping structures, while for the highly doped structures the transport is well modelled by a two dimensional array of islands model. We have used an original method to fabricate silicon test nanostructures used to investigate the electrical transport mechanisms in low dimensional systems.
