Automated design flow for no-cost configuration error detection in SRAM-based FPGAs
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | International Conference on ReConFigurable Computing and FPGAs (ReConFig' 13) |
| Author | Ben Jrad, M., Leveugle, Régis |
| Maintainer | CCSD |
| Last Updated | May 5, 2026, 22:18 (UTC) |
| Created | May 5, 2026, 22:18 (UTC) |
| Identifier | hal-00963336 |
| Language | en |
| contributor | Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS) |
| coverage | Cancun, Mexico |
| creator | Ben Jrad, M. |
| date | 2013-12-09T00:00:00 |
| harvest_object_id | 75b2bcae-a6af-4f4a-b12a-2562f6653d58 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2026-03-26T00:00:00 |
| relation | info:eu-repo/semantics/altIdentifier/doi/10.1109/ReConFig.2013.6732272 |
| set_spec | type:COMM |