Solving the periodic steady-state operating condition of a phase-locked loop or delay-locked loop circuit using a transient estimation method
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | https://unilim.hal.science/hal-00924473 |
| Author | Estep, George, Ngoya, Edouard, Webber, Don |
| Maintainer | CCSD |
| Last Updated | May 7, 2026, 15:24 (UTC) |
| Created | May 7, 2026, 15:24 (UTC) |
| Identifier | Patent N°: US20070255547 |
| Language | en |
| contributor | C2S2 ; XLIM (XLIM) ; Université de Limoges (UNILIM)-Centre National de la Recherche Scientifique (CNRS)-Université de Limoges (UNILIM)-Centre National de la Recherche Scientifique (CNRS) |
| creator | Estep, George |
| date | 2007-11-01T00:00:00 |
| harvest_object_id | 811f857e-d5ee-4e23-a5ab-96126e080b13 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2023-03-24T00:00:00 |
| set_spec | type:PATENT |