Design of a pseudo-log image transform IP in an HLS-based memory management framework
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | Proceedings of Conference of Real-Time Image and Video Processing |
| Author | Butt, S., Mancini, Stéphane, Rousseau, Frédéric, Lavagno, L. |
| Maintainer | CCSD |
| Last Updated | May 7, 2026, 18:16 (UTC) |
| Created | May 7, 2026, 18:16 (UTC) |
| Identifier | hal-00919902 |
| Language | en |
| contributor | Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS) |
| coverage | Burlingame, California, United States |
| creator | Butt, S. |
| date | 2013-02-06T00:00:00 |
| harvest_object_id | adc38771-ce22-4c00-a802-21d16c0cead4 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2026-03-26T00:00:00 |
| relation | info:eu-repo/semantics/altIdentifier/doi/10.1117/12.2004272 |
| set_spec | type:COMM |
