Rapid Design and Prototyping of a Reconfigurable Decoder Architecture for QC-LDPC Codes
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | RSP 2013 : 24th IEEE International Symposium on Rapid System Prototyping |
| Author | Murugappa Velayuthan, Purushotham, Lapotre, Vianney, Baghdadi, Amer, Jezequel, Michel |
| Maintainer | CCSD |
| Last Updated | May 9, 2026, 06:44 (UTC) |
| Created | May 9, 2026, 06:44 (UTC) |
| Identifier | hal-00876088 |
| Language | en |
| contributor | Département Electronique (ELEC) ; Université européenne de Bretagne - European University of Brittany (UEB)-Télécom Bretagne-Institut Mines-Télécom [Paris] (IMT) |
| coverage | Montreal, Canada |
| creator | Murugappa Velayuthan, Purushotham |
| date | 2013-10-03T00:00:00 |
| harvest_object_id | 312defe6-ff3c-4424-bfa6-9c726809ba74 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2026-01-23T00:00:00 |
| set_spec | type:COMM |