Formal Verification of Hardware Synthesis
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | CAV 2013 |
| Author | Braibant, Thomas, Chlipala, Adam |
| Maintainer | CCSD |
| Last Updated | May 15, 2026, 06:08 (UTC) |
| Created | May 15, 2026, 06:08 (UTC) |
| Identifier | hal-00776876 |
| Language | en |
| Rights | https://about.hal.science/hal-authorisation-v1/ |
| contributor | Programming languages, types, compilation and proofs (GALLIUM) ; Inria Paris-Rocquencourt ; Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria) |
| coverage | Saint Petersburg, Russia |
| creator | Braibant, Thomas |
| date | 2013-07-13T00:00:00 |
| harvest_object_id | 6cfb34cd-a9be-4ee5-908c-c81e31b47bb6 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2026-04-28T00:00:00 |
| relation | info:eu-repo/semantics/altIdentifier/arxiv/1301.4779 |
| set_spec | type:COMM |