Mitigating DC-Side Power Oscillations and Negative Sequence Load Currents in Modular Multilevel Converters under Unbalanced Faults- First Approach using Resonant PI
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | Proceedings of the 38th Annual Conference of IEEE Industrial Electronics |
| Author | Bergna Diaz, Gilbert, Suul, J.-A., Berne, E., Egrot, P., Lefranc, Pierre, Vannier, Jean-Claude, Arzandé, Amir, Molinas, M. |
| Maintainer | CCSD |
| Last Updated | May 31, 2026, 07:20 (UTC) |
| Created | May 31, 2026, 07:20 (UTC) |
| Identifier | hal-00764818 |
| Language | en |
| contributor | Supélec Sciences des Systèmes (E3S) ; Ecole Supérieure d'Electricité - SUPELEC (FRANCE) |
| coverage | Montreal, Canada |
| creator | Bergna Diaz, Gilbert |
| date | 2012-10-25T00:00:00 |
| harvest_object_id | 45611a71-05a0-4b8d-8a21-f40fe48cc862 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2026-02-07T00:00:00 |
| relation | info:eu-repo/semantics/altIdentifier/doi/10.1109/IECON.2012.6388769 |
| set_spec | type:COMM |