A fast hierarchical arbitration scheme for multi-tb/s packet switches with shared memory switching
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | ISSN: 1089-7089 |
| Author | Popa, Daniel, Post, Georg, Noirie, Ludovic |
| Maintainer | CCSD |
| Last Updated | May 31, 2026, 11:46 (UTC) |
| Created | May 31, 2026, 11:46 (UTC) |
| Identifier | hal-00764415 |
| Language | en |
| contributor | Alcatel-Lucent Bell Labs France [Nozay] ; Alcatel-Lucent Bell Labs France |
| creator | Popa, Daniel |
| date | 2009-08-24T00:00:00 |
| harvest_object_id | baed1ffe-eac6-46a6-86bb-6eaf39a6a75d |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2015-09-30T00:00:00 |
| relation | info:eu-repo/semantics/altIdentifier/doi/10.1002/bltj.20374 |
| set_spec | type:ART |