EXPLOITING PARTIALLY RECONFIGURABLE FPGA FOR PERFORMANCE ADJUSTMENT IN THE RVC FRAMEWORK
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | Proceedings of the 7TH IEEE INTERNATIONAL DESIGN & TEST SYMPOSIUM (IDT) |
| Author | Hentati, Manel, Aoudni, Yassine, Nezan, Jean François, Abid, Mohamed |
| Maintainer | CCSD |
| Last Updated | May 31, 2026, 18:31 (UTC) |
| Created | May 31, 2026, 18:31 (UTC) |
| Identifier | hal-00763871 |
| Language | en |
| Rights | https://about.hal.science/hal-authorisation-v1/ |
| contributor | Département de Génie Électrique de Sfax [ENIS] (CEM Lab - ENIS) ; المدرسة الوطنية للمهندسين بصفاقس = National Engineering School of Sfax (ENIS) ; جامعة صفاقس - Université de Sfax - University of Sfax-جامعة صفاقس - Université de Sfax - University of Sfax |
| coverage | Doha, Qatar |
| creator | Hentati, Manel |
| date | 2012-12-15T00:00:00 |
| harvest_object_id | e0e592f7-ab8e-4bd6-a5c4-e0d42cf3c1d2 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2025-05-28T00:00:00 |
| set_spec | type:COMM |