Speeding-up SIMD instructions dynamic binary translation in embedded processor simulation

ISBN 978-1-61284-208-0

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Additional Info

Field Value
Source Proc. of Design Automation and Test in Europe Conference (DATE'11)
Author Fournel, N., Pétrot, Frédéric, Michel, L.
Maintainer CCSD
Last Updated May 24, 2026, 05:58 (UTC)
Created May 24, 2026, 05:58 (UTC)
Identifier hal-00680339
Language en
contributor Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)
coverage Grenoble, France
creator Fournel, N.
date 2011-03-14T00:00:00
harvest_object_id b9398326-2ef7-44de-a96b-2e3e69a51dd2
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2026-03-26T00:00:00
set_spec type:COMM