Neural harmonic detection approaches for FPGA area efficient implementation

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Source ISSN: 1286-0042
Author Dzondé, S., Kom, C.H., Berviller, H., Blondé, J.P., Flieller, D., Kom, M., Braun, F.
Maintainer CCSD
Last Updated May 26, 2026, 10:11 (UTC)
Created May 26, 2026, 10:11 (UTC)
Identifier hal-00675156
Language en
contributor Institut d'Electronique du Solide et des Systèmes (InESS) ; Université de Strasbourg (UNISTRA)-Centre National de la Recherche Scientifique (CNRS)
creator Dzondé, S.
date 2011-05-26T00:00:00
harvest_object_id 65de580f-08c3-490c-a37a-c4281b3870ec
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2025-06-04T00:00:00
relation info:eu-repo/semantics/altIdentifier/doi/10.1051/epjap/2011100332
set_spec type:ART