Variability-aware task mapping strategies for many-cores processor chips
Data and Resources
Additional Info
| Field | Value |
|---|---|
| Source | Proc. of IEEE International On-line Testing Symposium (IOLT'11) |
| Author | Chaix, F., Bizot, G., Nicolaidis, M., Zergainoh, Nacer-Eddine |
| Maintainer | CCSD |
| Last Updated | May 28, 2026, 05:49 (UTC) |
| Created | May 28, 2026, 05:49 (UTC) |
| Identifier | hal-00671358 |
| Language | en |
| contributor | Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA) ; Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS) |
| coverage | Athens, Greece |
| creator | Chaix, F. |
| date | 2011-07-13T00:00:00 |
| harvest_object_id | 6a18190d-f2e9-433d-ba9e-85ac25c072e4 |
| harvest_source_id | 3374d638-d20b-4672-ba96-a23232d55657 |
| harvest_source_title | test moissonnage SELUNE |
| metadata_modified | 2026-03-26T00:00:00 |
| relation | info:eu-repo/semantics/altIdentifier/doi/10.1109/IOLTS.2011.5993811 |
| set_spec | type:COMM |