Presents an interactive communication synthesis approach for multiprocessor systems. The aim of the approach consists in mapping a high level specification into a modular and flexible target architecture. The input specification is composed of a set of finite state machines that communicate via a procedural call mechanism. If we assume that the communication critical part is done through a shared memory, this approach allows us to refine the communication structures (interfaces, controllers) in order to reach an operational model easily mappable onto the target architecture. While the choice of communication protocols influences what the best partition is, the target architecture is extendible in order to minimize the communication cost that can be added by the partitioning. The proposed approach is validated through the design of a communication controller
