From NoC Security Analysis To Design Solutions

This paper addresses a new kind of security vulnerable spots introduced by Network-on-chip (NoC) use in System-on-Chip (SoC) design. This study is based on the experience of a CAD framework for NoC design and proposes a classification of weaknesses with regard to usual routing and interface techniques. Finally design strategies are proposed and a new path routing technique (SCP) is introduced with the aim to enforce security.

Data and Resources

Additional Info

Field Value
Source SIPS 2005, Workshop on Signal Processing Systems
Author Evain, Samuel, Diguet, Jean-Philippe
Maintainer CCSD
Last Updated May 15, 2026, 08:41 (UTC)
Created May 15, 2026, 08:41 (UTC)
Identifier hal-00077374
Language en
Rights https://about.hal.science/hal-authorisation-v1/
contributor Institut d'Electronique et de Télécommunications de Rennes (IETR) ; Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes) ; Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Ecole Supérieure d'Electricité - SUPELEC (FRANCE)-Centre National de la Recherche Scientifique (CNRS)
coverage Athens, Greece
creator Evain, Samuel
date 2005-05-15T00:00:00
harvest_object_id 36dc2cca-0490-43a6-ba69-81373d178007
harvest_source_id 3374d638-d20b-4672-ba96-a23232d55657
harvest_source_title test moissonnage SELUNE
metadata_modified 2026-01-23T00:00:00
set_spec type:COMM