Topology-Aware Load Balancing for Performance Portability over Parallel High Performance Systems
type: Dataset
contact point: Organization
  fn: CCSD
keyword: architecture-des-ordinateurs
keyword: infoinfo-dccomputer-science-csdistributed-parallel-and-cluster-computing-csdc
keyword: scheduling
keyword: programmation-parallele
keyword: ordonnancement
keyword: theses
keyword: computer-architecture
keyword: infoeu-reposemanticsdoctoralthesis
keyword: profiling
keyword: parallel-programming
landing page: https://theses.hal.science/tel-00981136
description: This thesis presents our research to provide performance portability and scalability to complex scientific applications running over hierarchical multicore parallel platforms. Performance portability is said to be attained when a low core idleness is achieved while mapping a given application to different platforms, and can be affected by performance problems such as load imbalance and costly communications, and overheads coming from the task mapping algorithm. Load imbalance is a result of irregular and dynamic load behaviors, where the amount of work to be processed varies depending on the task and the step of the simulation. Meanwhile, costly communications are caused by a task distribution that does not take into account the different communication times present in a hierarchical platform. This includes nonuniform and asymmetric communication costs at memory and network levels. Lastly, task mapping overheads come from the execution time of the task mapping algorithm trying to mitigate load imbalance and costly communications, and from the migration of tasks. Our approach to achieve the goal of performance portability is based on the hypothesis that precise machine topology information can help task mapping algorithms in their decisions. In this context, we proposed a generic machine topology model of parallel platforms composed of one or more multicore compute nodes. It includes profiled latencies and bandwidths at memory and network levels, and highlights asymmetries and nonuniformity at both levels. This information is employed by our three proposed topology-aware load balancing algorithms, named NucoLB, HwTopoLB, and HierarchicalLB. Besides topology information, these algorithms also employ application information gathered during runtime. NucoLB focuses on the nonuniform aspects of parallel platforms, while HwTopoLB considers the whole hierarchy in its decisions, and HierarchicalLB combines these algorithms hierarchically to reduce its task mapping overhead. …
issued: 2026-05-05T13:58:32.463215
language: en
modified: 2026-05-05T13:58:32.463221

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type: Agent

Topology-Aware Load Balancing for Performance Portability over Parallel High Performance Systems
type: Distribution
access URL: https://theses.hal.science/tel-00981136
format: HTML
issued: 2026-05-05T13:58:32.466230
modified: 2026-05-05T13:58:32.450882