System-Level Power Estimation Methodology for MPSoC based Platforms
type: Dataset
description: Shifting the design entry point up to the system-level is the most important countermeasure adopted to manage the increasing complexity of Multiprocessor System on Chip (MPSoC). The reason is that decisions taken at this level, early in the design cycle, have the greatest impact on the final design in terms of power and energy efficiency. However, taking decisions at this level is very difficult, since the design space is extremely wide and it has so far been mostly a manual activity. Efficient system-level power estimation tools are therefore necessary to enable proper Design Space Exploration (DSE) based on power/energy and timing.
identifier: NNT: 2013VALE0006
issued: 2026-05-07T02:08:27.073658
language: en
modified: 2026-05-07T02:08:27.073663
contact point: Organization
  fn: CCSD
keyword: analyse-fonctionnelle-de-la-puissance
keyword: design-space-exploration-dse
keyword: functional-level-power-analysis
keyword: infoeu-reposemanticsdoctoralthesis
keyword: mpsoc
keyword: spiotherengineering-sciences-physicsother
keyword: technique-de-simulation-au-niveau-transactionnel
keyword: theses
landing page: https://theses.hal.science/tel-00943272

System-Level Power Estimation Methodology for MPSoC based Platforms
type: Distribution
format: HTML
issued: 2026-05-07T02:08:27.086573
modified: 2026-05-07T02:08:27.064882
access URL: https://theses.hal.science/tel-00943272

test_moissonnage_selune
type: Agent