Technology of monolithic integration of Side JFET
type: Dataset
contact point: Organization
  fn: CCSD
keyword: power-transistor
keyword: deep-etching
keyword: contact-ohmique
keyword: semiconductor-characterisation
keyword: carbure-de-silicium
keyword: power-electronics
keyword: transistor--de-puissance-a-jonction-a-effet-de-champ-en-sic---jfet-sic-de-puissance
keyword: silicon-carbide-component
keyword: theses
keyword: spiotherengineering-sciences-physicsother
keyword: caracterisation-de-semiconducteurs
keyword: infoeu-reposemanticsdoctoralthesis
keyword: caracterisation-electrique
keyword: jfet---power-junction-field-effect-transistor
keyword: gravure-plasma
keyword: composant-en-carbure-de-silicium
keyword: jfet-lateraux
keyword: ohmic-contact
keyword: electronique-de-puissance
landing page: https://theses.hal.science/tel-00940370
description: Silicon carbide (SiC) a semiconductor is as wide band gap, notable for its physical properties located between silicon and diamond. The inherent properties of silicon carbide (SiC) high thermal conductivity, and high breakdown voltage make it a very promising material for high power, high temperature and high-frequency device applications. The thesis focused on the removal of technological barriers to achieve lateral components JFET (Junction Field Effect Transistor) and monolithically integrated in SiC-4H substrates. The objective is to realize an arm of inverter integrated there SIC with two floors command and power. Initially, we started this thesis by a characterization of two lots of components JFET with channels N and P realized during two previous ANR this thesis. In this study, we extracted several positive points, such, the breakdown voltage of the JFET power and monolithic integration of low voltage JFET. But we have also highlighted the need to optimize the structure of components and improve some technological steps, mainly the definition channels by ion implantation, the ohmic contact and deep etching. Extensive to achieve ohmic contact on SiC P type and methods for performing deep etching in SiC studies have been developed. These studies have resulted in a low resistance comparable to the state of the art world contact, having sizes in higher current and therefore a better modulation. For etching, a hard mask to silicon and nickel (NiSi) has enabled us to develop a novel method that allows deep etching of SiC JFETs achieve integrated structures. All these technological improvements allowed us to get new batches of P and N JFET integrated on the same chip components with better performance compared to previous achievements, especially with conduction channels 10 to 100 times important. We also got a modulation current Ids as a function of the voltage Vgs on a large number of JFET significantly increasing the performance compared to previous batches.
identifier: NNT: 2013ISAL0031
issued: 2026-05-07T04:01:06.292839
language: fr
modified: 2026-05-07T04:01:06.292844

Technology of monolithic integration of Side JFET
type: Distribution
access URL: https://theses.hal.science/tel-00940370
format: HTML
issued: 2026-05-07T04:01:06.305354
modified: 2026-05-07T04:01:06.274367

test_moissonnage_selune
type: Agent