SEEPROC : a reconfigurable data path processor model for embedded image processing
The work presented in this manuscript suggest an architecture of a reconfigurable datapath processor (RDP) dedicated to low-level image processing. To meet the requirements of this field, the processor, called SeeProc and based on a RISC architecture, includes in its datapath customs processing elements specifically dedicated to the computation of image data in matrix form. These units can be configured in number and functionality depending on the application. The datapath interconnection topology is provided dynamically using a crossbar device. In addition, to make the programming accessible to users with no knowledge of electronics digital, a dedicated assembly language and an optimization methodology have been developed.