Improving the Performance of Transactional Memory Applications on Multicores : A Machine Learning-based Approach
type: Dataset
description: Multicore processors are now a mainstream approach to deliver higher performance to parallel applications. In order to develop efficient parallel applications for those platforms, developers must take care of several aspects, ranging from the architectural to the application level. In this context, Transactional Memory (TM) appears as a programmer friendly alternative to traditional lock-based concurrency for those platforms. It allows programmers to write parallel code as transactions, which are guaranteed to execute atomically and in isolation regardless of eventual data races. At runtime, transactions are executed speculatively and conflicts are solved by re-executing conflicting transactions. Although TM intends to simplify concurrent programming, the best performance can only be obtained if the underlying runtime system matches the application and platform characteristics. The contributions of this thesis concern the analysis and improvement of the performance of TM applications based on Software Transactional Memory (STM) on multicore platforms. Firstly, we show that the TM model makes the performance analysis of TM applications a daunting task. To tackle this problem, we propose a generic and portable tracing mechanism that gathers specific TM events, allowing us to better understand the performances obtained. The traced data can be used, for instance, to discover if the TM application presents points of contention or if the contention is spread out over the whole execution. Our tracing mechanism can be used with different TM applications and STM systems without any changes in their original source codes. Secondly, we address the performance improvement of TM applications on multicores. We point out that thread mapping is very important for TM applications and it can considerably improve the global performances achieved. To deal with the large diversity of TM applications, STM systems and multicore platforms, we propose an approach based on Machine Learning t…
identifier: NNT: 2012GRENM074
issued: 2026-05-30T06:59:24.387229
language: fr
modified: 2026-05-30T06:59:24.387240
contact point: Organization
  fn: CCSD
keyword: apprentissage-automatique
keyword: infoeu-reposemanticsdoctoralthesis
keyword: infoinfo-ohcomputer-science-csother-csoh
keyword: machine-learning
keyword: memoire-transactionnelle-logicielle
keyword: placement-de-threads
keyword: software-transactional-memory
keyword: theses
keyword: thread-mapping
keyword: tracage
keyword: tracing
landing page: https://theses.hal.science/tel-00766983

Improving the Performance of Transactional Memory Applications on Multicores : A Machine Learning-based Approach
type: Distribution
format: HTML
issued: 2026-05-30T06:59:24.466949
modified: 2026-05-30T06:59:24.342723
access URL: https://theses.hal.science/tel-00766983

test_moissonnage_selune
type: Agent