The evolution of the microelectronic technology leads to a transistors integration density always stronger. The Damascene copper interconnections structures follow this tendency and must be controlled in terms of manufacturing, performance and robustness, these different aspects being intimately related to the residual stresses and resistivity. This thesis aims to understand the mechanisms of the residual stresses generation and identify the different contributions to the resistivity of these objects as a function of annealing conditions and dimensions (from about a hundred of nm to several µm). In order to do this, the respective effects of the microstructure and dimensions of electroplated copper films and lines were separated on the basis of analytical models integrating microstructural and geometrical parameters. The microstructure was principally analysed from mappings of crystalline orientations achieved by EBSD. For the copper lines of width 0.2 and 1 µm, the residual stresses were deduced from the exploitation of nano-rotating sensors specially elaborated. The results obtained show that independently of the annealing temperature, the resistivity and residual stresses increase observed toward the small dimensions arises from the diminution of the average crystallites size and the geometrical confinement more pronounced. Furthermore, the resistivity increase results also of the electrons reflection probability growth at grains boundaries. This last point was associated to the reduction of the proportion of special grains boundaries having a high atomic coherency.
Mechanical stress and resistivity analysis of the integrated circuits copper interconnections : microstructural and geometrical confinement effect