@prefix dcat: <http://www.w3.org/ns/dcat#> .
@prefix dct: <http://purl.org/dc/terms/> .
@prefix foaf: <http://xmlns.com/foaf/0.1/> .
@prefix vcard: <http://www.w3.org/2006/vcard/ns#> .
@prefix xsd: <http://www.w3.org/2001/XMLSchema#> .

<https://rec.harvest-normandie.data4citizen.com/dataset/oai-hal-hal-00079196v1> a dcat:Dataset ;
    dct:description """
              The principal problem of component-based design is that the behavior of the RTL model may be incorrect. This article presents the formalization of the problem and proposes an automatic correction method (called delay correction) to solve it. We propose two algorithms which perform the optimal solution in latency and area. The effectiveness of the approach and the optimality of the proposed solutions are mathematically proven.
            """ ;
    dct:identifier "hal-00079196" ;
    dct:issued "2026-05-14T06:59:59.417400"^^xsd:dateTime ;
    dct:language "fr" ;
    dct:modified "2026-05-14T06:59:59.417406"^^xsd:dateTime ;
    dct:publisher <https://rec.harvest-normandie.data4citizen.com/organization/cce9db95-46d9-4dc2-84b6-764215d0a002> ;
    dct:title "Delay Correction in RTL Models of DSP SoC obtained by IP-based design approach" ;
    dcat:contactPoint [ a vcard:Organization ;
            vcard:fn "CCSD" ] ;
    dcat:distribution <https://rec.harvest-normandie.data4citizen.com/dataset/oai-hal-hal-00079196v1/resource/cb093bef-e8ac-4aef-894e-6e500cffe202> ;
    dcat:keyword "assemblage-automatique",
        "conception-systeme",
        "correction-de-retard",
        "dsp",
        "dsp-ip-parametrable",
        "infoeu-reposemanticsarticle",
        "journal-articles",
        "modele-fonctionnel",
        "pacs-8542",
        "rtl",
        "spinanoengineering-sciences-physicsmicro-and-nanotechnologiesmicroelectronics",
        "systeme-monopuce",
        "theorie-des-graphes" ;
    dcat:landingPage <ISSN:%200752-4072> .

<ISSN:%200752-4072> a foaf:Document .

<https://rec.harvest-normandie.data4citizen.com/dataset/oai-hal-hal-00079196v1/resource/cb093bef-e8ac-4aef-894e-6e500cffe202> a dcat:Distribution ;
    dct:format "HTML" ;
    dct:issued "2026-05-14T06:59:59.456581"^^xsd:dateTime ;
    dct:modified "2026-05-14T06:59:59.373087"^^xsd:dateTime ;
    dct:title "Delay Correction in RTL Models of DSP SoC obtained by IP-based design approach" ;
    dcat:accessURL <https://hal.science/hal-00079196> .

<https://rec.harvest-normandie.data4citizen.com/organization/cce9db95-46d9-4dc2-84b6-764215d0a002> a foaf:Agent ;
    foaf:name "test_moissonnage_selune" .