Dataset - CKAN

FPGA Prototype of Flexible Heterogeneous multi-ASIP NoC-based Unified Turbo R...

International audience
- HTML
Architecture Efﬁciency of Application-Speciﬁc Processors: a 170Mbit/s 0.644mm...

International audience
- HTML
FPGA Prototyping and Performance Evaluation of Multi-standard Turbo/LDPC Enco...

International audience
- HTML
Compression of redundancy free trellis stages in Turbo-Decoder

International audience
- HTML
Parameterized area-efficient multi-standard turbo decoder

International audience
- HTML
Analysis of the Convergence Process by EXIT Charts for Parallel Implementatio...

International audience
- HTML

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